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854S14AKI PDF预览

854S14AKI

更新时间: 2024-11-24 19:44:47
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
14页 288K
描述
Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, MO-220, VQFN-24

854S14AKI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:4 X 4 MM, 0.95 MM HEIGHT, MO-220, VQFN-24针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92系列:854S
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N24
JESD-609代码:e0长度:4 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:24
实输出次数:4最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC24,.16SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):225
电源:2.5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:4 mmBase Number Matches:1

854S14AKI 数据手册

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PRELIMINARY  
LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-  
LVDS FANOUT BUFFER  
ICS854S14I  
GENERAL DESCRIPTION  
FEATURES  
The ICS854S14I is a high speed 1-to-4 Differential-  
Four differential LVDS outputs  
ICS  
HiPerClockS™  
to-LVDS Fanout Buffer and is a member of the  
HiPerClockS™ family of high performance clock  
IN, nIN pair can accept the following differential input levels:  
LVPECL, LVDS, SSTL  
solutions from IDT. The ICS854S14I is optimized  
for high speed and very low output skew, making  
50Ω internal input termination to VT  
Output frequency: 1.5GHz  
it suitable for use in demanding applications such as SONET,  
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The  
internally terminated differential input and VREF_AC pin allow  
other differential signal families such as LVPECL, LVDS, and  
SSTL to be easily interfaced to the input with minimal use of  
external components. The device also has output enable pins  
which may be useful for system test and debug purposes.  
Output skew: 30ps (typical)  
Part-to-part skew: TBD  
Additive phase jitter, RMS: 0.135ps (typical)  
Propagation delay: 1.1ns (typical)  
2.5V operating supply  
APPLICATIONS:  
-40°C to 85°C ambient operating temperature  
Processor clock distribution  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
622MHz central office clock distribution  
High speed network routing  
Wireless basestations  
Serdes LVPECL output to FPGA LVDS input translator  
Fibre channel clock distribution  
AMC clock driver for ATCA systems  
Gigabit ethernet clock distibution  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
OE0  
24 23 22 21 20 19  
Q0  
nQ0  
1
2
3
18  
17  
16  
GND  
Q0  
VDD  
Q3  
OE1  
nQ0  
nQ3  
IN  
nQ1  
Q1  
4
15 nQ2  
14 Q2  
Q1  
50Ω  
5
6
VT  
nQ1  
50Ω  
13  
VDD  
GND  
nIN  
OE2  
7
8
9 10 11 12  
Q2  
VREF_AC  
nQ2  
ICS854S14I  
OE3  
24-Lead VFQFN  
Q3  
4mm x 4mm x 0.95 package body  
K Package  
nQ3  
Top View  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVDS FANOUT BUFFER  
1
ICS854S14AKI REV. A FEBRUARY 23, 2007  

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