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854S54AKI-01LF PDF预览

854S54AKI-01LF

更新时间: 2022-02-26 12:54:10
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 229K
描述
Dual 2:1, 1:2 Differential-to-LVDS Multiplexer

854S54AKI-01LF 数据手册

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Dual 2:1, 1:2 Differential-to-LVDS  
Multiplexer  
ICS854S54I-01  
Datasheet  
Description  
Features  
The ICS854S54I-01 is a 2:1/1:2 Multiplexer. The 2:1 Multiplexer  
allows one of two inputs to be selected onto one output pin and the  
1:2 MUX switches one input to both outputs. This device may be  
useful for multiplexing multi-rate Ethernet PHYs which have 100Mbit  
and 1000Mbit transmit/receive pairs onto an optical SFP module  
which has a single transmit/receive pair. Another mode allows loop  
back testing and allows the output of a PHY transmit pair to be routed  
to the PHY input pair. For examples, please refer to the Application  
Information section of the data sheet.  
Dual 2:1, 1:2 MUX  
Three LVDS output pairs  
Three differential clock inputs can accept: LVPECL, LVDS, CML  
Loopback test mode available  
Maximum output frequency: 2.5GHz  
Propagation delay: 600ps (maximum)  
Part-to-part skew: 300ps (maximum)  
Additive phase jitter, RMS: 0.031ps (typical)  
Full 2.5V supply mode  
The ICS854S54I-01 is optimized for applications requiring very high  
performance and has a maximum operating frequency of 2.5GHz.  
The device is packaged in a small, 3mm x 3mm VFQFN package,  
making it ideal for use on space-constrained boards.  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Pin Assignment  
Block Diagram  
SELB  
16 15 14 13  
1
2
3
12  
11  
10  
QA0  
nQA0  
QA1  
INA0  
nINA0  
INA1  
INA0  
nINA0  
nQA1  
4
nINA1  
9
5
6
7
8
INB  
LOOP0  
0
nINB  
QA0  
ICS854S54I-01  
nQA0  
16-Lead VFQFN  
3mm x 3mm x 0.925mm package body  
Top View  
1
0
QB  
nQB  
INA1  
1
nINA1  
LOOP1  
QA1  
nQA1  
SELA  
ICS854S54I-01 July 17, 2017  
1
©2017 Integrated Device Technology, Inc.  

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