Datasheet > 854S54AKI-01LF

854S54AKI-01LF

更新时间： 2022-02-26 12:54:10

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
17页	229K
描述
Dual 2:1, 1:2 Differential-to-LVDS Multiplexer

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854S54AKI-01LF 数据手册

ICS854S54I-01 Datasheet

DUAL 2:1, 1:2 DIFFERENTIAL-TO-LVDS MULTIPLEXER

Table 1. Pin Descriptions

Number

1, 2

Name

QA0, nQA0

QA1, nQA1

INB

Type

Description

Output

Input

Differential output pair. LVDS interface levels.

Non-inverting differential clock input.

3, 4

Pulldown

Pullup/

Pulldown

nINB

Input

Inverting differential clock input. V_DD/2 default when left floating.

Select pin for QAx outputs. When HIGH, selects same inputs used for QB output.

When LOW, selects INB input. LVCMOS/LVTTL interface levels.

SELB

GND

Input

Power

Input

Pulldown

Power supply ground.

Pullup/

Pulldown

nINA1

INA1

Inverting differential clock input. V_DD/2 default when left floating.

Non-inverting differential clock input.

Pulldown

Pullup/

Pulldown

nINA0

Inverting differential clock input. V_DD/2 default when left floating.

INA0

V_DD

Input

Pulldown

Non-inverting differential clock input.

Power supply pin.

Power

Select pin for QB outputs. When HIGH, selects INA1 input.

When LOW, selects INA0 input. LVCMOS/LVTTL interface levels.

SELA

Input

Pulldown

15, 16

nQB, QB

Output

Differential output pair. LVDS interface levels.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Symbol

Parameter

Test Conditions

Minimum

Typical

37.5

Maximum

Units

k

R_PULLUP

Input Pullup Resistor

R_PULLDOWNInput Pulldown Resistor

37.5

k

Function Tables

Table 3. Control Input Function Table

Control Inputs

SELA

SELB

Mode

LOOP0 selected (default)

LOOP1 selected

Loopback mode: LOOP0

Loopback mode: LOOP1

ICS854S54I-01 July 17, 2017

123 4 5 6 7...17

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