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7R8FLE222C15 PDF预览

7R8FLE222C15

更新时间: 2024-10-29 03:56:39
品牌 Logo 应用领域
美高森美 - MICROSEMI 存储闪存
页数 文件大小 规格书
13页 238K
描述
Flash Card, 4MX16, 150ns, CARD-68

7R8FLE222C15 数据手册

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PCMCIA Flash Memory Card  
FLE Series  
White Electronic Designs  
CARD SIGNAL DESCRIPTION  
Symbol  
Type  
Name and Function  
A0 - A25  
INPUT  
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not  
used in word access mode. A25 is the most signicant bit  
DQ0 - DQ15  
CE1#, CE2#  
INPUT/OUTPUT  
INPUT  
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ15 is the MSB.  
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0,  
CE1# and CE2# allows 8-bit hosts to access all data on DQ0 - DQ7.  
OE#  
INPUT  
OUTPUT ENABLE: Active low signal gating read data from the memory card.  
WRITE ENABLE: Active low signal gating write data to the memory card.  
WE#  
INPUT  
RDY/BSY#  
OUTPUT  
READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. A high output indicates that  
the card is ready to accept accesses. A low output indicates that one or more devices in the memory card are busy  
with internally timed erase or write activities.  
CD1#, CD2#  
WP  
OUTPUT  
OUTPUT  
CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the  
memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins.  
WRITE PROTECT: Write protect reects the status of the Write Protect switch on the memory card. WP set to high  
= write protected, providing internal hardware write lockout to the Flash array. If card does not include optional write  
protect switch, this signal will be pulled low internally indicating write protect = “off”.  
VPP1, VPP2  
VCC  
N.C.  
PROGRAM/ERASE POWER SUPPLY: Not connected for 5V only card.  
CARD POWER SUPPLY: 5.0V for all internal circuitry.  
GROUND: for all internal circuitry.  
GND  
REG#  
INPUT  
INPUT  
ATTRIBUTE MEMORY SELECT: provides access to Flash memory card registers and Card Information Structure in  
the Attribute Memory Plane.  
RST  
RESET: Active high signal for placing card in Power-on default state. Reset can be used as a Power-Down signal for  
the memory array.  
WAIT#  
OUTPUT  
OUTPUT  
OUTPUT  
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.  
BVD1, BVD2  
VS1, VS2  
BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility.  
VOLTAGE SENSE: Noties the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V  
card has been inserted.  
RFU  
N.C.  
RESERVED FOR FUTURE USE  
NO INTERNAL CONNECTION TO CARD: pin may be driven or left oating  
August 2000  
Rev. 4  
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  

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