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74VHC595BQ-Q100 PDF预览

74VHC595BQ-Q100

更新时间： 2024-11-30 14:37:23
品牌 Logo 应用领域
恩智浦 - NXP 输出元件逻辑集成电路触发器
页数 文件大小 规格书
21页 202K
描述
IC AHC/VHC/H/U/V SERIES, 8-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PQCC16, 2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT763-1, DHVQFN-16, Shift Register

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74VHC595BQ-Q100 技术参数

生命周期：Transferred零件包装代码：QFN
包装说明：HVQCCN,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.58计数方向：RIGHT
系列：AHC/VHC/H/U/VJESD-30 代码：R-PQCC-N16
长度：3.5 mm逻辑集成电路类型：SERIAL IN SERIAL OUT
位数：8功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：RECTANGULAR
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE传播延迟（tpd）：20.1 ns
筛选级别：AEC-Q100座面最大高度：1 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD触发器类型：POSITIVE EDGE
宽度：2.5 mm最小 fmax：90 MHz
Base Number Matches：1

74VHC595BQ-Q100 数据手册

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74VHC595-Q100;  
74VHCT595-Q100  
8-bit serial-in/serial-out or parallel-out shift register with  
output latches  
Rev. 1 — 15 November 2013  
Product data sheet  
1. General description  
The 74VHC595-Q100; 74VHCT595-Q100 are high-speed Si-gate CMOS devices and are  
pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with  
JEDEC standard No. 7A.  
The 74VHC595-Q100; 74VHCT595-Q100 are 8-stage serial shift registers with a storage  
register and 3-state outputs. The shift registers have separate clocks.  
Data is shifted on the positive-going transitions of the shift register clock input (SHCP).  
The data in each register is transferred to the storage register on a positive-going  
transition of the storage register clock input (STCP). If both clocks are connected together,  
the shift register is always one clock pulse ahead of the storage register.  
The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.  
It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The  
storage register has 8 parallel 3-state bus driver outputs. Data in the storage register  
appears at the output whenever the output enable input (OE) is LOW.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have Schmitt-trigger action  
Inputs accept voltages higher than VCC  
Input levels:  
The 74VHC595-Q100 operates with CMOS input level  
The 74VHCT595-Q100 operates with TTL input level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  
Multiple package options  
 
 
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