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74V1G77CTR PDF预览

74V1G77CTR

更新时间: 2024-11-06 04:01:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 127K
描述
SINGLE D-TYPE LATCH

74V1G77CTR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SC-70
包装说明:TSSOP, TSSOP6,.08针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
系列:74VJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:2 mm
逻辑集成电路类型:D LATCH最大I(ol):0.004 A
湿度敏感等级:1位数:1
功能数量:1端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 V传播延迟(tpd):13 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:HIGH LEVEL宽度:1.25 mm
Base Number Matches:1

74V1G77CTR 数据手册

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74V1G77  
SINGLE D-TYPE LATCH  
HIGH SPEED: t = 4.4ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 1µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOT23-5L  
SOT323-5L  
T & R  
|I | = I = 8mA (MIN) at V = 4.5V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
PACKAGE  
V
CC  
SOT23-5L  
74V1G77STR  
74V1G77CTR  
IMPROVED LATCH-UP IMMUNITY  
SOT323-5L  
DESCRIPTION  
The 74V1G77 is an advanced high-speed CMOS  
SINGLE D-TYPE LATCH fabricated with  
sub-micron silicon gate and double-layer metal  
wiring C MOS technology. It is designed to  
operate from 2V to 5.5V, making this device ideal  
for portable applications.  
The single D-Type latch is controlled by a Latch  
Enable Input (LE).  
While the LE input is held at a high level, the Q  
output will follow the data input precisely. When  
the LE input is taken low the Q output is latched  
precisely at the logic level of D input data.  
Power down protection is provided on inputs and  
0 to 7V can be accepted on inputs with no regard  
to the supply voltage. This device can be used to  
interface 5V to 3V. It’s available in the commercial  
and extended temperature range.  
All inputs and output are equipped with protection  
circuits against static discharge, giving them ESD  
immunity and transient excess voltage.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2004  
1/10  

74V1G77CTR 替代型号

型号 品牌 替代类型 描述 数据表
74V1G79CTR STMICROELECTRONICS

完全替代

SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP
74V1G77STR STMICROELECTRONICS

类似代替

SINGLE D-TYPE LATCH
74V1G80CTR STMICROELECTRONICS

类似代替

SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP

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