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74V1G79STR PDF预览

74V1G79STR

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 203K
描述
SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP

74V1G79STR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT-23包装说明:SOT-23, 5 PIN
针数:5Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:8.03
Is Samacsys:N系列:74V
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大I(ol):0.004 A
湿度敏感等级:1位数:1
功能数量:1端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP5/6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
Prop。Delay @ Nom-Sup:11 ns传播延迟(tpd):11 ns
认证状态:Not Qualified座面最大高度:1.45 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:1.625 mm
最小 fmax:150 MHzBase Number Matches:1

74V1G79STR 数据手册

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74V1G79  
SINGLE POSITIVE EDGE TRIGGERED  
D-TYPE FLIP-FLOP  
HIGH SPEED:  
= 180MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 1µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
SOT23-5L  
SOT323-5L  
T & R  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 8mA (MIN) at V = 4.5V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
t
t
PLH  
PHL  
PACKAGE  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
SOT23-5L  
74V1G79STR  
74V1G79CTR  
V
CC  
SOT323-5L  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
Following the hold time interval, data at the D input  
can be changed without affecting the level at the  
output. Power down protection is provided on  
inputs and 0 to 7V can be accepted on inputs with  
no regard to the supply voltage. This device can  
be used to interface 5V to 3V systems.  
It’s available in the commercial and extended  
temperature range. All inputs and output are  
equipped with protection circuits against static  
discharge, giving them ESD immunity and  
transient excess voltage.  
The 74V1G79 is an advanced high-speed CMOS  
SINGLE POSITIVE EDGE TRIGGERED D-TYPE  
FLIP-FLOP fabricated with sub-micron silicon  
2
gate and double-layer metal wiring C MOS  
technology. it is designed to operate from 2V to  
5.5V, making this device ideal for portable  
applications.  
This D-Type flip-flop is controlled by a clock input  
(CK). On the positive transition of the clock, the Q  
output will be set to the logic state that was setup  
at the D input.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
July 2001  
1/10  

74V1G79STR 替代型号

型号 品牌 替代类型 描述 数据表
74V1G80CTR STMICROELECTRONICS

完全替代

SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP
74V1G77STR STMICROELECTRONICS

类似代替

SINGLE D-TYPE LATCH
74V1G80STR STMICROELECTRONICS

类似代替

SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP

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