Datasheet > 74LVTH573WM

74LVTH573WM

更新时间： 2025-09-22 19:51:23

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
12页	427K
描述
IC LATCH TRANSP OCT 3ST 20SOIC

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技术参数
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74LVTH573WM 技术参数

是否无铅：	不含铅	生命周期：	Obsolete
包装说明：	SOIC-20	Reach Compliance Code：	unknown
Factory Lead Time：	1 week	风险等级：	5.64
Base Number Matches：	1

74LVTH573WM 数据手册

August 2024

74LVT573, 74LVTH573

Low Voltage Octal Transparent Latch with 3-STATE Outputs

Features

General Description

■ Input and output interface capability to systems at

The LVT573 and LVTH573 consist of eight latches

with 3-STATE outputs for bus organized system applica-

tions. The latches appear transparent to the data when

Latch Enable (LE) is HIGH. When LE is low, the data

satisfying the input timing requirements is latched. Data

appears on the bus when the Output Enable (OE) is

LOW. When OE is HIGH, the bus output is in the high

impedance state.

5V V

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH573),

also available without bushold feature (74LVT573)

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free

bus loading

The LVTH573 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

■ Outputs source/sink –32mA/+64mA

■ Functionally compatible with the 74 series 573

■ Latch-up performance exceeds 500mA

■ ESD performance:

These octal latches are designed for low-voltage (3.3V)

applications, but with the capability to provide a TTL

– Human-body model > 2000V

– Machine model > 200V

interface to a 5V environment. The LVT573 and

LVTH573 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation.

– Charged-device model > 1000V

Ordering Information

Package

Order Number Number

Package Description

74LVT573WM

74LVT573SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVT573MSA

74LVT573MTC

MSA20

MTC20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74LVTH573WM

74LVTH573SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVTH573MSA

74LVTH573MTC

MSA20

MTC20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

www.fairchildsemi.com

74LVT573, 74LVTH573 Rev. 2.0

12 3 4 5 6 7...12

中文翻译

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与74LVTH573WM相关器件

型号	品牌	获取价格	描述	数据表
74LVTH573WMX	FAIRCHILD	获取价格	Low Voltage Octal Transparent Latch with 3-STATE Outputs
74LVTH573WMX	ROCHESTER	获取价格	LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 0.300 INCH, MS-013, SOIC-20
74LVTH573WMX	ONSEMI	获取价格	IC LATCH TRANSP OCT 3ST 20SOIC
74LVTH573_08	FAIRCHILD	获取价格	74LVT573, 74LVTH573 Low Voltage Octal Transparent Latch with 3-STATE Outputs
74LVTH574	FAIRCHILD	获取价格	Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
74LVTH574	NXP	获取价格	3.3 V octal D-type flip-flop; 3-state
74LVTH574D	NXP	获取价格	3.3 V octal D-type flip-flop; 3-state
74LVTH574D,112	NXP	获取价格	74LVT(H)574 - 3.3 V octal D-type flip-flop; 3-state SOP 20-Pin
74LVTH574D,118	NXP	获取价格	74LVT(H)574 - 3.3 V octal D-type flip-flop; 3-state SOP 20-Pin
74LVTH574DB	NXP	获取价格	3.3 V octal D-type flip-flop; 3-state

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