Datasheet > 74LVT240_08

74LVT240_08

更新时间： 2024-11-06 04:47:55

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		驱动器
页数	文件大小	规格书
10页	322K
描述
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

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中文翻译

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数据手册

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74LVT240_08 数据手册

January 2008

74LVT240, 74LVTH240

Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

Features

General Description

■ Input and output interface capability to systems at

The LVT240 and LVTH240 are inverting octal buffers

and line drivers designed to be employed as memory

address drivers, clock drivers and bus oriented transmit-

ters or receivers which provides improved PC board

density.

5V V

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH240),

also available without bushold feature (74LVT240)

■ Live insertion/extraction permitted

The LVTH240 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

■ Power Up/Down high impedance provides glitch-free

bus loading

■ Outputs source/sink –32mA/+64mA

■ Functionally compatible with the 74 series 240

■ Latch-up performance exceeds 500mA

■ ESD performance:

These octal buffers and line drivers are designed for low-

voltage (3.3V) V applications, but with the capability to

provide a TTL interface to a 5V environment. The LVT240

and LVTH240 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining low power dissipation.

– Human-body model > 2000V

– Machine model > 200V

– Charged-device model > 1000V

Ordering Information

Package

Order Number Number

Package Description

74LVT240WM

74LVT240SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVT240MSA

74LVT240MTC

MSA20

MTC20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74LVTH240WM

74LVTH240SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVTH240MSA

74LVTH240MTC

MSA20

MTC20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

74LVT240, 74LVTH240 Rev. 1.5.0

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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与74LVT240_08相关器件

型号	品牌	获取价格	描述	数据表
74LVT240D	NXP	获取价格	ABT octal inverting buffer 3-State
74LVT240D	NEXPERIA	获取价格	3.3 V Octal inverting buffer/line driver; 3-stateProduction
74LVT240D,112	NXP	获取价格	74LVT240 - ABT octal inverting buffer (3-State) SOP 20-Pin
74LVT240DB	NXP	获取价格	ABT octal inverting buffer 3-State
74LVT240DB,112	NXP	获取价格	74LVT240 - ABT octal inverting buffer (3-State) SSOP2 20-Pin
74LVT240DB,118	NXP	获取价格	74LVT240 - ABT octal inverting buffer (3-State) SSOP2 20-Pin
74LVT240DB-T	ETC	获取价格	Dual 4-Bit Inverting Buffer/Driver
74LVT240D-T	NXP	获取价格	LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
74LVT240MSA	FAIRCHILD	获取价格	Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVT240MSAX	FAIRCHILD	获取价格	Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

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