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74LVT14DB,118 PDF预览

74LVT14DB,118

更新时间: 2024-11-06 14:30:07
品牌 Logo 应用领域
恩智浦 - NXP 信息通信管理光电二极管逻辑集成电路触发器
页数 文件大小 规格书
13页 85K
描述
74LVT14 - 3.3 V hex inverter Schmitt trigger SSOP1 14-Pin

74LVT14DB,118 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SSOP1包装说明:SSOP, SSOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.38
Is Samacsys:N系列:LVT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:6.2 mm逻辑集成电路类型:INVERTER
最大I(ol):0.032 A湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):3 mA
Prop。Delay @ Nom-Sup:5.7 ns传播延迟(tpd):6.9 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

74LVT14DB,118 数据手册

 浏览型号74LVT14DB,118的Datasheet PDF文件第2页浏览型号74LVT14DB,118的Datasheet PDF文件第3页浏览型号74LVT14DB,118的Datasheet PDF文件第4页浏览型号74LVT14DB,118的Datasheet PDF文件第5页浏览型号74LVT14DB,118的Datasheet PDF文件第6页浏览型号74LVT14DB,118的Datasheet PDF文件第7页 
74LVT14  
3.3 V hex inverter Schmitt trigger  
Rev. 02 — 25 April 2008  
Product data sheet  
1. General description  
The 74LVT14 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.  
It is capable of transforming slowly changing input signals into sharply defined, jitter free  
output signals. In addition, it has a greater noise margin than conventional inverters.  
Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase  
splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to  
effectively speed-up slow input transitions, and provide different input threshold voltages  
for positive-going and negative-going inputs. The threshold differential (typically 600 mV)  
is determined internally by resistor ratios and is insensitive to temperature and supply  
voltage variations.  
2. Features  
I Different positive and negative going input threshold voltages  
I Tolerant of slow input transitions  
I High noise immunity  
I TTL input and output switching levels  
I Output capability: +32 mA/20 mA  
I Latch-up protection exceeds 500 mA per JESD78 class II level A  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVT14D  
40 °C to +85 °C  
40 °C to +85 °C  
40 °C to +85 °C  
40 °C to +85 °C  
SO14  
plastic small outline package; 14 leads;  
body width 7.5 mm  
SOT108-1  
74LVT14DB  
74LVT14PW  
74LVT14BQ  
SSOP14  
TSSOP14  
plastic shrink small outline package; 14 leads;  
body width 5.3 mm  
SOT337-1  
SOT402-1  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1  
thin quad flat package; no leads; 14 terminals;  
body 2.5 × 4.5 × 0.85 mm  
 
 
 

74LVT14DB,118 替代型号

型号 品牌 替代类型 描述 数据表
74LVT14D,112 NXP

完全替代

74LVT14 - 3.3 V hex inverter Schmitt trigger SOIC 14-Pin

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