February 1992
Revised June 2001
74LVQ244
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
Features
■ Ideal for low power/low noise 3.3V applications
The LVQ244 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides
improved PC board density.
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-
ages
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity
Ordering Code:
Order Number
74LVQ244SC
74LVQ244SJ
Package Number
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
M20D
74LVQ244QSC
MQA20
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
L
H
Z
Pin Descriptions
Pin Names
Description
H
OE1, OE2
I0–I7
3-STATE Output Enable Inputs
Inputs
Outputs
Inputs
OE2
In
(Pins 3, 5, 7, 9)
O0–O7
Outputs
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level L = LOW Voltage Level
X = Immaterial Z = High Impedance
© 2001 Fairchild Semiconductor Corporation
DS011356
www.fairchildsemi.com