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74LVC1G19GW-Q100 PDF预览

74LVC1G19GW-Q100

更新时间: 2024-11-19 11:10:59
品牌 Logo 应用领域
安世 - NEXPERIA 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
11页 196K
描述
1-of-2 decoder/demultiplexerProduction

74LVC1G19GW-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.59系列:LVC/LCX/Z
输入调节:STANDARDJESD-30 代码:R-PDSO-G6
长度:2 mm逻辑集成电路类型:OTHER DECODER/DRIVER
湿度敏感等级:1功能数量:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):13.1 ns
筛选级别:AEC-Q100座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.25 mmBase Number Matches:1

74LVC1G19GW-Q100 数据手册

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74LVC1G19-Q100  
1-of-2 decoder/demultiplexer  
Rev. 4 — 27 January 2022  
Product data sheet  
1. General description  
The 74LVC1G19-Q100 is a 1-of-2 decoder/demultiplexer with a common output enable. This  
device buffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement)  
when the enable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state.  
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these  
devices in a mixed 3.3 V and 5 V environment.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.  
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry  
disables the output, preventing the potentially damaging backflow current through the device when  
it is powered down.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range from 1.65 V to 5.5 V  
Overvoltage tolerant inputs to 5.5 V  
High noise immunity  
±24 mA output drive (VCC = 3.0 V)  
CMOS low power dissipation  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
IOFF circuitry provides partial Power-down mode operation  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
JESD36 (4.5 V to 5.5 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVC1G19GW-Q100  
-40 °C to +125 °C  
TSSOP6  
plastic thin shrink small outline package; 6 leads; SOT363-2  
body width 1.25 mm  
 
 
 

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