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74LVC1G27GN PDF预览

74LVC1G27GN

更新时间: 2024-11-19 01:00:03
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
16页 235K
描述
Single 3-input NOR gate

74LVC1G27GN 数据手册

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74LVC1G27  
Single 3-input NOR gate  
Rev. 3 — 19 April 2019  
Product data sheet  
1. General description  
The 74LVC1G27 provides one 3-input NOR function.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices  
as translators in mixed 3.3 V and 5 V applications.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101-C exceeds 1000 V  
±24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 

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