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74LVC02ADR2G PDF预览

74LVC02ADR2G

更新时间: 2024-11-26 01:23:27
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
8页 95K
描述
Low-Voltage CMOS Quad 2-Input NAND Gate

74LVC02ADR2G 数据手册

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74LVC02A  
Low-Voltage CMOS Quad  
2-Input NOR Gate  
With 5 V−Tolerant Inputs  
The 74LVC02A is a high performance, quad 2−input NOR gate  
operating from a 1.2 to 3.6 V supply. High impedance TTL compatible  
inputs significantly reduce current loading to input drivers while TTL  
www.onsemi.com  
compatible outputs offer improved switching noise performance. A V  
I
specification of 5.5 V allows 74LVC02A inputs to be safely driven  
from 5 V devices.  
Current drive capability is 24 mA at the outputs.  
SOIC−14 NB  
D SUFFIX  
CASE 751A  
TSSOP−14  
DT SUFFIX  
CASE 948G  
Features  
PIN ASSIGNMENT  
Designed for 1.2 V to 3.6 V V Operation  
CC  
5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic  
24 mA Output Sink and Source Capability  
V
O2  
13  
B2  
12  
A2  
11  
O3  
10  
B3  
9
A3  
8
CC  
14  
Near Zero Static Supply Current (10 mA) Substantially Reduces  
System Power Requirements  
ESD Performance: Human Body Model >2000 V;  
Machine Model >200 V  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
1
2
3
4
5
6
7
Compliant  
O0  
A0  
B0  
O1  
A1  
B1 GND  
2
MARKING DIAGRAMS  
A0  
1
O0  
3
14  
B0  
5
A1  
LVC02AG  
AWLYWW  
4
O1  
6
B1  
11  
A2  
1
13  
O2  
12  
SOIC−14 NB  
B2  
8
A3  
10  
O3  
14  
9
B3  
LVC  
02A  
Figure 1. Logic Diagram  
ALYWG  
G
1
TSSOP−14  
A
= Assembly Location  
WL, L  
Y
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
1
© Semiconductor Components Industries, LLC, 2015  
Publication Order Number:  
September, 2015 − Rev. 0  
74LVC02A/D  

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