Datasheet > 74LV1T86GW

74LV1T86GW

更新时间： 2024-11-13 11:10:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	229K
描述
2-input single supply translating EXCLUSIVE-OR gateProduction

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74LV1T86GW 数据手册

74LV1T86

2-input single supply translating EXCLUSIVE-OR gate

Rev. 4 — 16 August 2022

Product data sheet

1. General description

The 74LV1T86 is a single, level translating 2-input Exclusive-OR gate . The low threshold inputs

support 1.8 V input logic at V_CC= 3.3 V and can be used in 1.8 V to 3.3 V level up translation.

In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at

V_CC= 2.5 V). The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V

and 5.0 V CMOS levels. The wide V_CCrange permits the generation of output levels to connect to

controllers or processors.

2. Features and benefits

•

Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V

Up translation

1.2 V to 1.8 V at V_CC= 1.8 V

•

1.5 V to 2.5 V at V_CC= 2.5 V

1.8 V to 3.3 V at V_CC= 3.3 V

3.3 V to 5.0 V at V_CC= 5.0 V

•

Down translation

•

3.3 V to 1.8 V at V_CC= 1.8 V

3.3 V to 2.5 V at V_CC= 2.5 V

5.0 V to 3.3 V at V_CC= 3.3 V

•

5 V tolerant inputs

Latch-up performance exceeds 250 mA per JESD 78 Class II

ESD protection:

•

HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2000 V

CDM JESD22-C101F exceeds 1000 V

•

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Applications

•

Portable applications

PC and notebooks

Industrial controller

Telecom

12 3 4 5 6 7...13

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