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74LV123D-T PDF预览

74LV123D-T

更新时间: 2024-02-09 01:39:50
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
24页 282K
描述
IC LV/LV-A/LVX/H SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16, Prescaler/Multivibrator

74LV123D-T 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.12系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR
湿度敏感等级:1数据/时钟输入次数:2
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3 V
传播延迟(tpd):92 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Prescaler/Multivibrators
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

74LV123D-T 数据手册

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74LV123  
Dual retriggerable monostable multivibrator with reset  
Rev. 7 — 12 December 2011  
Product data sheet  
1. General description  
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible  
with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which  
uses three methods to control the output pulse width:  
1. The basic pulse time is programmed by the selection of an external resistor (REXT  
)
and capacitor (CEXT). These are normally connected as shown in Figure 9.  
2. Once triggered, the basic output pulse width may be extended by retriggering the  
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By  
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made  
as long as desired (see Figure 12).  
3. Alternatively, an output delay can be terminated at any time by a LOW-going edge on  
input nRD, which also inhibits the triggering (see Figure 13).  
Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower  
input rise and fall times.  
2. Features and benefits  
Optimized for low-voltage applications: 1.0 V to 5.5 V  
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 C  
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 C  
DC triggered from active HIGH or active LOW inputs  
Retriggerable for very long pulses up to 100 % duty factor  
Direct reset terminates output pulses  
Schmitt-trigger action on all inputs except for the reset input  
 
 

74LV123D-T 替代型号

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