5秒后页面跳转
74LV125PW,112 PDF预览

74LV125PW,112

更新时间: 2024-09-21 15:27:39
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 99K
描述
74LV125 - Quad buffer/line driver; 3-state TSSOP 14-Pin

74LV125PW,112 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.77
控制类型:ENABLE LOW系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.008 A
湿度敏感等级:1位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:18 ns
传播延迟(tpd):31 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

74LV125PW,112 数据手册

 浏览型号74LV125PW,112的Datasheet PDF文件第2页浏览型号74LV125PW,112的Datasheet PDF文件第3页浏览型号74LV125PW,112的Datasheet PDF文件第4页浏览型号74LV125PW,112的Datasheet PDF文件第5页浏览型号74LV125PW,112的Datasheet PDF文件第6页浏览型号74LV125PW,112的Datasheet PDF文件第7页 
74LV125  
Quad buffer/line driver; 3-state  
Rev. 03 — 7 April 2009  
Product data sheet  
1. General description  
The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible  
with 74HC125 and 74HCT125.  
The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The  
3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE  
causes the outputs to assume a high-impedance OFF-state.  
2. Features  
I Wide operating voltage: 1.0 V to 5.5 V  
I Optimized for low voltage applications: 1.0 V to 3.6 V  
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C  
I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 °C  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LV125N  
74LV125D  
40 °C to +125 °C  
40 °C to +125 °C  
DIP14  
SO14  
plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
SOT108-1  
plastic small outline package; 14 leads;  
body width 3.9 mm  
74LV125DB  
74LV125PW  
40 °C to +125 °C  
40 °C to +125 °C  
SSOP14  
plastic shrink small outline package; 14 leads;  
body width 5.3 mm  
SOT337-1  
SOT402-1  
TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
 
 
 

74LV125PW,112 替代型号

型号 品牌 替代类型 描述 数据表
74LV125PW,118 NXP

完全替代

74LV125 - Quad buffer/line driver; 3-state TSSOP 14-Pin

与74LV125PW,112相关器件

型号 品牌 获取价格 描述 数据表
74LV125PW,118 NXP

获取价格

74LV125 - Quad buffer/line driver; 3-state TSSOP 14-Pin
74LV125PWDH NXP

获取价格

Quad buffer/line driver 3-State
74LV125PWDH-T NXP

获取价格

LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
74LV125PW-T NXP

获取价格

LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 4.40 MM, PLASTIC, MO-153, SO
74LV126 NXP

获取价格

Quad buffer/line driver 3-State
74LV126A TI

获取价格

QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
74LV126D NXP

获取价格

Quad buffer/line driver 3-State
74LV126DB NXP

获取价格

Quad buffer/line driver 3-State
74LV126DB-T PHILIPS

获取价格

Bus Driver, 1-Func, 4-Bit, True Output, CMOS, PDSO14,
74LV126D-T PHILIPS

获取价格

Bus Driver, 1-Func, 4-Bit, True Output, CMOS, PDSO14,