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74LCX16374MEAX_NL

更新时间: 2024-11-04 20:07:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 126K
描述
Bus Driver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, MO-118, SSOP-48

74LCX16374MEAX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP48,.4
针数:48Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.18
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G48
JESD-609代码:e3长度:15.875 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:170000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6.2 ns
传播延迟(tpd):7.4 ns认证状态:Not Qualified
座面最大高度:2.74 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.495 mmBase Number Matches:1

74LCX16374MEAX_NL 数据手册

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February 1994  
Revised May 2005  
74LCX16374  
Low Voltage 16-Bit D-Type Flip-Flop  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX16374 contains sixteen non-inverting D-type  
flip-flops with 3-STATE outputs and is intended for bus ori-  
ented applications. The device is byte controlled. A buff-  
ered clock (CP) and Output Enable (OE) are common to  
each byte and can be shorted together for full 16-bit opera-  
tion.  
2.3V–3.6V VCC specifications provided  
6.2 ns tPD max (VCC 3.3V), 20 A ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
The LCX16374 is designed for low voltage (2.5V or 3.3V)  
24 mA output drive (VCC 3.0V)  
VCC applications with capability of interfacing to a 5V signal  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
environment.  
The LCX16374 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human body model 2000V  
Machine model 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16374G  
(Note 2)(Note 3)  
BGA54A  
MS48A  
MTD48  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
74LCX16374MEA  
(Note 3)  
74LCX16374MTD  
(Note 3)  
Note 2: Ordering code Gindicates Trays.  
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbol  
© 2005 Fairchild Semiconductor Corporation  
DS012003  
www.fairchildsemi.com  

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