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74LCX16500MEA PDF预览

74LCX16500MEA

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
10页 104K
描述
Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

74LCX16500MEA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:0.300 INCH, MO-118, SSOP-56针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.47
Is Samacsys:N其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:18功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):8.4 ns认证状态:Not Qualified
座面最大高度:2.74 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:NEGATIVE EDGE宽度:7.5 mm
Base Number Matches:1

74LCX16500MEA 数据手册

 浏览型号74LCX16500MEA的Datasheet PDF文件第2页浏览型号74LCX16500MEA的Datasheet PDF文件第3页浏览型号74LCX16500MEA的Datasheet PDF文件第4页浏览型号74LCX16500MEA的Datasheet PDF文件第5页浏览型号74LCX16500MEA的Datasheet PDF文件第6页浏览型号74LCX16500MEA的Datasheet PDF文件第7页 
March 1995  
Revised June 2002  
74LCX16500  
Low Voltage 18-Bit Universal Bus Transceivers with  
5V Tolerant Inputs and Outputs  
General Description  
These 18-bit universal bus transceivers combine D-type  
latches and D-type flip-flops to allow data flow in transpar-  
ent, latched, and clocked modes.  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
6.0 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Data flow in each direction is controlled by output-enable  
(OEAB and OEBA), latch-enable (LEAB and LEBA), and  
clock (CLKAB and CLKBA) inputs.  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX16500 is designed for low voltage (2.5V or 3.3V)  
VCC applications with the capability of interfacing to a 5V  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
signal environment.  
The LCX16500 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power.  
Human body model > 2000V  
Machine model > 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC and OE tied to GND through a resistor: the minimum  
value or the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16500G  
(Note 2)(Note 3)  
BGA54A  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
74LCX16500MEA  
(Note 3)  
MS56A  
MTD56  
74LCX16500MTD  
(Note 3)  
Note 2: Ordering code Gindicates Trays.  
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
© 2002 Fairchild Semiconductor Corporation  
DS012407  
www.fairchildsemi.com  

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