5秒后页面跳转
74LCX16500 PDF预览

74LCX16500

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线收发器
页数 文件大小 规格书
10页 104K
描述
Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

74LCX16500 数据手册

 浏览型号74LCX16500的Datasheet PDF文件第2页浏览型号74LCX16500的Datasheet PDF文件第3页浏览型号74LCX16500的Datasheet PDF文件第4页浏览型号74LCX16500的Datasheet PDF文件第5页浏览型号74LCX16500的Datasheet PDF文件第6页浏览型号74LCX16500的Datasheet PDF文件第7页 
March 1995  
Revised June 2002  
74LCX16500  
Low Voltage 18-Bit Universal Bus Transceivers with  
5V Tolerant Inputs and Outputs  
General Description  
These 18-bit universal bus transceivers combine D-type  
latches and D-type flip-flops to allow data flow in transpar-  
ent, latched, and clocked modes.  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
6.0 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Data flow in each direction is controlled by output-enable  
(OEAB and OEBA), latch-enable (LEAB and LEBA), and  
clock (CLKAB and CLKBA) inputs.  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX16500 is designed for low voltage (2.5V or 3.3V)  
VCC applications with the capability of interfacing to a 5V  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
signal environment.  
The LCX16500 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power.  
Human body model > 2000V  
Machine model > 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC and OE tied to GND through a resistor: the minimum  
value or the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16500G  
(Note 2)(Note 3)  
BGA54A  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
74LCX16500MEA  
(Note 3)  
MS56A  
MTD56  
74LCX16500MTD  
(Note 3)  
Note 2: Ordering code Gindicates Trays.  
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
© 2002 Fairchild Semiconductor Corporation  
DS012407  
www.fairchildsemi.com  

与74LCX16500相关器件

型号 品牌 获取价格 描述 数据表
74LCX16500G FAIRCHILD

获取价格

Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
74LCX16500GX ETC

获取价格

18-Bit Bus Transceiver
74LCX16500MEA FAIRCHILD

获取价格

Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
74LCX16500MEAX FAIRCHILD

获取价格

BUS TRANSCEIVER|SINGLE|18-BIT|LCX-CMOS|SSOP|56PIN|PLASTIC
74LCX16500MTD FAIRCHILD

获取价格

Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
74LCX16500MTD ONSEMI

获取价格

低压18位通用总线收发器,带5V容差输入和输出
74LCX16500MTDX ONSEMI

获取价格

低压18位通用总线收发器,带5V容差输入和输出
74LCX16501 FAIRCHILD

获取价格

18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
74LCX16501MEA FAIRCHILD

获取价格

18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
74LCX16501MEAX ETC

获取价格

18-Bit Bus Transceiver