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74LCX16501MEAX PDF预览

74LCX16501MEAX

更新时间: 2024-11-03 23:24:19
品牌 Logo 应用领域
其他 - ETC 总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
8页 85K
描述
18-Bit Bus Transceiver

74LCX16501MEAX 数据手册

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October 1995  
Revised March 2001  
74LCX16501  
Low Voltage 18-Bit Universal Bus Transceivers  
with 5V Tolerant Inputs and Outputs  
General Description  
The LCX16501 is an 18-bit universal bus transceiver com-  
bining D-type latches and D-type flip-flops to allow data  
flow in transparent, latched, and clocked modes.  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
6.0 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Data flow in each direction is controlled by output-enable  
(OEAB and OEBA), latch-enable (LEAB and LEBA), and  
clock (CLKAB and CLKBA) inputs.  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA Output Drive (VCC = 3.0V)  
The LCX16501 is designed for low voltage (2.5V or 3.3V)  
V
CC applications with capability of interfacing to a 5V signal  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
environment.  
The LCX16501 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power.  
ESD performance:  
Human body model > 2000V  
Machine model < 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC and OE tied to GND through a resistor: the minimum  
value or the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16501MEA  
74LCX16501MTD  
MS56A  
MTD56  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available on Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
© 2001 Fairchild Semiconductor Corporation  
DS012550  
www.fairchildsemi.com  

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