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74HC4052PW PDF预览

74HC4052PW

更新时间: 2024-02-28 00:37:52
品牌 Logo 应用领域
飞利浦 - PHILIPS 光电二极管
页数 文件大小 规格书
32页 162K
描述
Differential Multiplexer, 1 Func, 4 Channel, CMOS, PDSO16

74HC4052PW 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:4 weeks
风险等级:2.09模拟集成电路 - 其他类型:DIFFERENTIAL MULTIPLEXER
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm湿度敏感等级:1
负电源电压最大值(Vsup):-5 V负电源电压最小值(Vsup):-1 V
标称负供电电压 (Vsup):-4.5 V信道数量:4
功能数量:1端子数量:16
标称断态隔离度:50 dB通态电阻匹配规范:6 Ω
最大通态电阻 (Ron):195 Ω最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
座面最大高度:1.1 mm最大供电电压 (Vsup):5 V
最小供电电压 (Vsup):1 V标称供电电压 (Vsup):4.5 V
表面贴装:YES最长断开时间:57 ns
最长接通时间:69 ns技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74HC4052PW 数据手册

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Philips Semiconductors  
Product specification  
Dual 4-channel analog multiplexer,  
demultiplexer  
74HC4052; 74HCT4052  
FEATURES  
DESCRIPTION  
Wide analog input voltage range from 5 V to +5 V  
Low ON-resistance:  
The 74HC4052/74HCT4052 are high-speed Si-gate  
CMOS devices and are pin compatible with the  
HEF4052B. They are specified in compliance with JEDEC  
standard no. 7A.  
– 80 (typical) at VCC VEE = 4.5 V  
– 70 (typical) at VCC VEE = 6.0 V  
– 60 (typical) at VCC VEE = 9.0 V  
The 74HC4052/74HCT4052 are dual 4-channel analog  
multiplexers or demultiplexers with common select logic.  
Each multiplexer has four independent inputs/outputs  
(pins nY0 to nY3) and a common input/output (pin nZ). The  
common channel select logics include two digital select  
inputs (pins S0 and S1) and an active LOW enable input  
(pin E). When pin E = LOW, one of the four switches is  
selected (low-impedance ON-state) with pins S0 and S1.  
When pin E = HIGH, all switches are in the  
Logic level translation: to enable 5 V logic to  
communicate with ±5 V analog signals  
Typical “break before make” built in  
Complies with JEDEC standard no. 8-1 A  
ESD protection:  
– HBM EIA/JESD22-A114-A exceeds 2000 V  
– MM EIA/JESD22-A115-A exceeds 200 V.  
Specified from 40 to +85 °C and 40 to +125 °C.  
high-impedance OFF-state, independent of pins S0 and  
S1.  
VCC and GND are the supply voltage pins for the digital  
control inputs (pins S0, S1, and E). The VCC to GND  
ranges are 2.0 to 10.0 V for 74HC4052 and 4.5 to 5.5 V  
for 74HCT4052. The analog inputs/outputs (pins nY0 to  
nY3 and nZ) can swing between VCC as a positive limit and  
VEE as a negative limit. VCC VEE may not exceed 10.0 V.  
APPLICATIONS  
Analog multiplexing and demultiplexing  
Digital multiplexing and demultiplexing  
Signal gating.  
For operation as a digital multiplexer/demultiplexer, VEE is  
connected to GND (typically ground).  
FUNCTION TABLE  
INPUT(1)  
CHANNEL BETWEEN  
E
S1  
S0  
L
L
L
L
H
L
L
L
H
L
nY0 and nZ  
nY1 and nZ  
nY2 and nZ  
nY3 and nZ  
none  
H
H
X
H
X
Note  
1. H = HIGH voltage level  
L = LOW voltage level  
X = don’t care.  
2003 May 16  
2

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