Datasheet > 74HC4053FT

74HC4053FT

更新时间： 2023-12-06 20:13:19

品牌	Logo	应用领域
东芝 - TOSHIBA		光电二极管
页数	文件大小	规格书
13页	293K
描述
Triple SPDT(1:2)/Analog Multiplexer, TSSOP16B

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74HC4053FT 数据手册

74HC4053FT

CMOS Digital Integrated Circuits Silicon Monolithic

74HC4053FT

1. Functional Description

•

Triple 2-Channel Analog Multiplexer/Demultiplexer

2. General

The 74HC4053FT is high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with silicon

gate CMOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining

the CMOS low power dissipation.

The 74HC4053FT has a 2 channel × 3 configuration.

The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude

signal (VCC - VEE) can then be switched by the small logical amplitude (VCC - GND) control signal.

For example, in the case of VCC = 5 V, GND = 0 V, VEE = -5 V, signals between -5 V and +5 V can be switched from

the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be

connected to circuits with low input impedance.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

3. Features

(1) Wide operating temperature range: Topr = -40 to 125 �

(2) Low power dissipation: ICC = 4.0 µA (max) (VCC = 6.0 V, VEE = GND, Ta = 25 �)

(3) High noise immunity: VNIH = VNIL = 28% VCC (min)

(4) Low ON-resistance: RON = 50 Ω (typ.) at VCC - VEE = 9 V

(5) High degree of linearity: THD = 0.020 % (typ.) at VCC - VEE = 9 V

(6) Pin and function compatible with 4053B

4. Packaging

TSSOP16B

Start of commercial production

2020-07

Toshiba Electronic Devices & Storage Corporation

2020-10-29

Rev.1.0

12 3 4 5 6 7...13

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