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74HC4053BQ PDF预览

74HC4053BQ

更新时间: 2024-01-12 05:29:02
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管
页数 文件大小 规格书
27页 399K
描述
Triple 2-channel analog multiplexer/demultiplexerProduction

74HC4053BQ 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:QCCN, LCC16,.1X.14,20Reach Compliance Code:unknown
风险等级:5.76Is Samacsys:N
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-PQCC-N16
信道数量:2功能数量:3
端子数量:16最大通态电阻 (Ron):225 Ω
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC16,.1X.14,20封装形状:RECTANGULAR
封装形式:CHIP CARRIER电源:2/6,GND/-6 V
认证状态:Not Qualified最大信号电流:0.025 A
子类别:Multiplexer or Switches最大供电电流 (Isup):0.16 mA
表面贴装:YES最长接通时间:220 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:AUTOMOTIVE端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
Base Number Matches:1

74HC4053BQ 数据手册

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74HC4053; 74HCT4053  
Triple 2-channel analog multiplexer/demultiplexer  
Rev. 12 — 9 February 2023  
Product data sheet  
1. General description  
The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable  
for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital  
select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ).  
A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off.  
Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to  
voltages in excess of VCC  
.
2. Features and benefits  
Wide analog input voltage range from -5 V to +5 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD78 Class II Level B  
Complies with JEDEC standard:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
Low ON resistance:  
80 Ω (typical) at VCC - VEE = 4.5 V  
70 Ω (typical) at VCC - VEE = 6.0 V  
60 Ω (typical) at VCC - VEE = 9.0 V  
Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals  
Typical ‘break before make’ built-in  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Applications  
Analog multiplexing and demultiplexing  
Digital multiplexing and demultiplexing  
Signal gating  
 
 
 

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