5秒后页面跳转
74HC3G07DP,125 PDF预览

74HC3G07DP,125

更新时间: 2024-02-08 04:07:38
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管逻辑集成电路
页数 文件大小 规格书
14页 181K
描述
74HC(T)3G07 - Triple buffer with open-drain outputs TSSOP 8-Pin

74HC3G07DP,125 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP包装说明:3 MM, PLASTIC, SOT505-2, TSSOP-8
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.55
系列:HC/UHJESD-30 代码:S-PDSO-G8
长度:3 mm负载电容(CL):50 pF
逻辑集成电路类型:BUFFER最大I(ol):0.004 A
湿度敏感等级:1功能数量:3
输入次数:1端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.16
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 VProp。Delay @ Nom-Sup:25 ns
传播延迟(tpd):125 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL/PALLADIUM/GOLD (NI/PD/AU)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

74HC3G07DP,125 数据手册

 浏览型号74HC3G07DP,125的Datasheet PDF文件第1页浏览型号74HC3G07DP,125的Datasheet PDF文件第3页浏览型号74HC3G07DP,125的Datasheet PDF文件第4页浏览型号74HC3G07DP,125的Datasheet PDF文件第5页浏览型号74HC3G07DP,125的Datasheet PDF文件第6页浏览型号74HC3G07DP,125的Datasheet PDF文件第7页 
NXP Semiconductors  
74HC3G07; 74HCT3G07  
Triple buffer with open-drain outputs  
4. Marking  
Table 2.  
Marking code  
Type number  
74HC3G07DP  
74HCT3G07DP  
74HC3G07DC  
74HCT3G07DC  
74HC3G07GD  
74HCT3G07GD  
Marking code[1]  
H07  
T07  
H07  
T07  
H07  
T07  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
1
1A  
2A  
3A  
1Y  
2Y  
3Y  
1A  
2A  
3A  
1Y  
2Y  
1
Y
3Y  
1
A
001aah762  
001aah763  
GND mna591  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
Fig 3. Logic diagram (one buffer)  
6. Pinning information  
6.1 Pinning  
74HC3G07  
74HCT3G07  
1A  
3Y  
1
2
3
4
8
7
6
5
V
CC  
74HC3G07  
74HCT3G07  
1Y  
3A  
2Y  
2A  
1
2
3
4
8
7
6
5
1A  
3Y  
V
CC  
1Y  
3A  
2Y  
GND  
2A  
GND  
001aak033  
Transparent top view  
001aak032  
Fig 4. Pin configuration SOT505-2 (TSSOP8) and  
SOT765-1 (VSSOP8)  
Fig 5. Pin configuration SOT996-2 (XSON8)  
74HC_HCT3G07  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 16 December 2013  
2 of 14  
 
 
 
 
 

与74HC3G07DP,125相关器件

型号 品牌 描述 获取价格 数据表
74HC3G07DP-Q100 NEXPERIA Triple buffer with open-drain outputs

获取价格

74HC3G07DP-Q100,125 NXP Buffer, HC/UH Series, 3-Func, 1-Input, CMOS, PDSO8

获取价格

74HC3G07GD NXP Triple buffer with open-drain outputs

获取价格

74HC3G07GD,125 NXP 74HC(T)3G07 - Triple buffer with open-drain outputs SON 8-Pin

获取价格

74HC3G07-Q100 NEXPERIA Triple buffer with open-drain outputs

获取价格

74HC3G14 NXP Inverting Schmitt-triggers

获取价格