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74HC283PW,118 PDF预览

74HC283PW,118

更新时间: 2024-11-21 14:47:03
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
20页 112K
描述
74HC283PWSOT403-1

74HC283PW,118 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.76
其他特性:FULL ADDER; WITH INTERNAL CARRY LOOKAHEAD; PERMITS RIPPLE CARRY CASCADING系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:ADDER/SUBTRACTOR湿度敏感等级:1
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):315 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

74HC283PW,118 数据手册

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74HC283  
4-bit binary full adder with fast carry  
Rev. 03 — 11 November 2004  
Product data sheet  
1. General description  
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power  
Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).  
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)  
according to the equation:  
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =  
= S1 + 2S2 + 4S3 + 8S4 + 16COUT  
Where (+) = plus.  
Due to the symmetry of the binary add function, the 74HC283 can be used with either all  
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case  
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as  
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is  
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,  
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.  
See the 74HC583 for the BCD version.  
2. Features  
High-speed 4-bit binary addition  
Cascadable in 4-bit increments  
Fast internal look-ahead carry  
Low-power dissipation  
Complies with JEDEC standard no. 7A  
ESD protection:  
HBM EIA/JESD22-A114-B exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V.  
Multiple package options  
Specified from 40 °C to +80 °C and from 40 °C to +125 °C.  
 
 

74HC283PW,118 替代型号

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