Datasheet > 74AXP1G97GN

74AXP1G97GN

更新时间： 2024-12-02 01:04:27

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
18页	874K
描述
Low-power configurable multiple function gate

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74AXP1G97GN 数据手册

74AXP1G58

Low-power configurable multiple function gate

Rev. 3 — 16 September 2015

Product data sheet

1. General description

The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The

device can be configured as any of the following logic functions AND, OR, NAND, NOR,

XOR, inverter and buffer. All inputs can be connected directly to V_CCor GND.

This device ensures very low static and dynamic power consumption across the entire

V_CCrange from 0.7 V to 2.75 V. This device is fully specified for partial power-down

applications using I_OFF. The I_OFFcircuitry disables the output, preventing the potentially

damaging backflow current through the device when it is powered down.

2. Features and benefits

 Wide supply voltage range from 0.7 V to 2.75 V

 Low input capacitance; C_I= 0.5 pF (typical)

 Low output capacitance; C_O= 1.0 pF (typical)

 Low dynamic power consumption; C_PD= 2.7 pF at V_CC= 1.2 V (typical)

 Low static power consumption; I_CC= 0.6 A (85 C maximum)

 High noise immunity

 Complies with JEDEC standard:

 JESD8-12A.01 (1.1 V to 1.3 V)

 JESD8-11A.01 (1.4 V to 1.6 V)

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A.01 (2.3 V to 2.7 V)

 ESD protection:

 HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV

 CDM JESD22-C101E exceeds 1000 V

 Latch-up performance exceeds 100 mA per JESD 78 Class II

 Inputs accept voltages up to 2.75 V

 Low noise overshoot and undershoot < 10% of V_CC

 I_OFFcircuitry provides partial power-down mode operation

 Multiple package options

 Specified from 40 C to +85 C

12 3 4 5 6 7...18

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