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74AVC1T8832GS PDF预览

74AVC1T8832GS

更新时间: 2024-09-17 11:11:43
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
13页 204K
描述
Single dual-supply translating 2-input OR with strobeProduction

74AVC1T8832GS 数据手册

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74AVC1T8832  
Single dual-supply translating 2-input OR with strobe  
Rev. 1 — 10 October 2018  
Product data sheet  
1. General description  
The 74AVC1T8832 is a single dual-supply translating 2-input OR with strobe inputs. It features  
two data input pins (A, B), two strobe input pins (STRA, STRB), one data output pin (Y) and  
dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage  
between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage  
nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A, B, STRA and STRB are referenced to  
VCC(A) and pin Y is referenced to VCC(B)  
.
The logic equation provided at the Y output is:  
Y = STRAA + STRBB  
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing any damaging backflow current through the device when it is  
powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, the Y output is in  
the high-impedance OFF-state.  
2. Features and benefits  
Wide supply voltage range:  
VCC(A): 0.8 V to 3.6 V  
VCC(B): 0.8 V to 3.6 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM: ANSI/ESDA/JEDEC JS-001 exceeds 8000 V  
CDM: ANSI/ESDA/JEDEC JS-002 exceeds 1000 V  
Maximum data rates:  
500 Mbit/s (1.8 V to 3.3 V translation)  
320 Mbit/s (<1.8 V to 3.3 V translation)  
320 Mbit/s (translate to 2.5 V or 1.8 V)  
280 Mbit/s (translate to 1.5 V)  
240 Mbit/s (translate to 1.2 V)  
Suspend mode  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 

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