Datasheet > 74AUP1T14GW

74AUP1T14GW

更新时间： 2023-09-03 20:29:30

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
14页	229K
描述
Low-power inverter with voltage-level translatorProduction

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74AUP1T14GW 数据手册

Nexperia

74AUP1T14

Low-power inverter with voltage-level translator

Symbol Parameter

T_amb= 25 °C

Conditions

25 °C

-40 °C to +85 °C -40 °C to +125 °C Unit

Min Typ[1] Max

Min

Max

Min

Max

C_PD

power

dissipation

capacitance

f_i= 1 MHz; V_I= GND to V_CC[3]

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

[1] All typical values are measured at nominal V_CC

[2] t_pdis the same as t_PLHand t_PHL

[3] C_PDis used to determine the dynamic power dissipation (P_Din μW).

P_D= C_PD× V_CC²× f_i× N + Σ(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in V;

N = number of inputs switching;

Σ(C_L× V_CC²× f_o) = sum of the outputs.

11.1. Waveforms and test circuit

A input

GND

PHL

PLH

Y output

mna640

Measurement points are given in Table 9

V_OLand V_OHare typical output voltage levels that occur with the output load.

Fig. 6. Input A to output Y propagation delay times

Table 9. Measurement points

Supply voltage

V_CC

Output

V_M

Input

V_M

V_I

t_r= t_f

2.3 V to 3.6 V

0.5 × V_CC

0.5 × V_I

1.65 V to 3.6 V

≤ 3.0 ns

74AUP1T14

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 25 January 2022

8 / 14

1...5 6 789 10 11...14

中文翻译

下载PDF

与74AUP1T14GW相关器件

型号	品牌	获取价格	描述	数据表
74AUP1T14GX	NEXPERIA	获取价格	Low-power inverter with voltage-level translatorProduction
74AUP1T17GW	NEXPERIA	获取价格	Low-power buffer with voltage-level translatorProduction
74AUP1T17GX	NEXPERIA	获取价格	Low-power buffer with voltage-level translatorProduction
74AUP1T32	NEXPERIA	获取价格	Low-power 2-input OR-gate with voltage-level translator
74AUP1T32GW	NEXPERIA	获取价格	Low-power 2-input OR-gate with voltage-level translator
74AUP1T32GX	NEXPERIA	获取价格	Low-power 2-input OR-gate with voltage-level translator
74AUP1T34	NXP	获取价格	Low-power dual supply translating buffer
74AUP1T34	DIODES	获取价格	Single Bit Dual Power Supply Translating Buffer with 3 State Outputs
74AUP1T34GF	NXP	获取价格	Low-power dual supply translating buffer
74AUP1T34GM	NXP	获取价格	Low-power dual supply translating buffer