Datasheet > 74AUP1G32GS,132

74AUP1G32GS,132

更新时间： 2024-02-23 18:58:42

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
21页	347K
描述
74AUP1G32 - Low-power 2-input OR-gate

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74AUP1G32GS,132 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	是否Rohs认证：	符合
生命周期：	Transferred	包装说明：	1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6
Reach Compliance Code：	compliant	风险等级：	5.76
Base Number Matches：	1

74AUP1G32GS,132 数据手册

74AUP1G32

NXP Semiconductors

Low-power 2-input OR-gate

11. Dynamic characteristics

Table 8.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9

Symbol

Parameter

Conditions

Min

Typ ^[1]

Max

Unit

T_amb= 25 C; C_L= 5 pF

[2]

t_pd

propagation delay

A, B to Y; see Figure 8

V_CC= 0.8 V

16.8

5.1

3.6

3.0

2.4

2.1

V_CC= 1.1 V to 1.3 V

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

2.4

1.6

1.4

1.1

1.0

10.9

6.6

5.2

3.9

3.5

T_amb= 25 C; C_L= 10 pF

t_pd

propagation delay

A, B to Y; see Figure 8

V_CC= 0.8 V

20.3

5.9

4.2

3.5

2.9

2.7

V_CC= 1.1 V to 1.3 V

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

2.3

1.9

1.7

1.4

1.3

12.7

7.7

6.0

4.6

4.3

_amb= 25 C; C_L= 15 pF

t_pd

propagation delay

A, B to Y; see Figure 8

V_CC= 0.8 V

23.8

6.7

4.8

4.0

3.3

3.1

V_CC= 1.1 V to 1.3 V

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

3.3

2.3

2.0

1.7

1.5

14.3

8.6

6.7

5.3

4.9

T_amb= 25 C; C_L= 30 pF

t_pd

propagation delay

A, B to Y; see Figure 8

V_CC= 0.8 V

34.1

9.0

6.3

5.3

4.4

4.2

V_CC= 1.1 V to 1.3 V

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

4.5

3.4

2.6

2.3

2.2

19.1

11.3

8.9

7.0

6.4

74AUP1G32

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Product data sheet

Rev. 7 — 8 July 2013

8 of 21

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