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74ALVCH16245T PDF预览

74ALVCH16245T

更新时间: 2024-11-17 23:24:07
品牌 Logo 应用领域
其他 - ETC 总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 74K
描述
BUS TRANSCEIVER|DUAL|8-BIT|AVC/ALVC-CMOS|TSSOP|48PIN|PLASTIC

74ALVCH16245T 数据手册

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74ALVCH16245  
LOW VOLTAGE CMOS 16-BIT TRANSCEIVER (3-STATE)  
WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
3.6V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
t
t
t
= 3.0 ns (MAX.) at V = 3.0 to 3.6V  
PD  
PD  
PD  
CC  
= 3.7 ns (MAX.) at V = 2.3 to 2.7V  
CC  
=6 ns (MAX.) at V = 1.65V  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
TSSOP  
TUBE  
|I | = I = 24mA (MIN) at V = 3.0V  
OH  
OL  
CC  
|I | = I = 12mA (MIN) at V = 2.3V  
OH  
OL  
CC  
ORDER CODES  
PACKAGE  
|I | = I = 4mA (MIN) at V = 1.65V  
OH  
OL  
CC  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 3.6V  
TSSOP  
74ALVCH16245T  
V
CC  
BUS HOLD PROVIDED ON DATA INPUTS  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 16245  
PIN CONNECTION  
LATCH-UP PERFORMANCE EXCEEDS  
300mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74ALVCH16245 is a low voltage CMOS 16  
BIT BUS TRANSCEIVER fabricated with  
sub-micron silicon gate and five-layer metal wiring  
2
C MOS technology. It is ideal for low power and  
very high speed 1.65 to 3.6V applications; it can  
be interfaced to 3.6V signal environment for both  
inputs and outputs.  
.This IC is intended for two-way asynchronous  
communication between data busses; the  
direction of data transmission is determined by  
DIR input. The enable input G can be used to  
disable the device so that the busses are  
effectively isolated.  
Active bus-hold circuitry holds unused or undriven  
inputs at a valid logic state.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
March 2002  
1/9  

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