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74ALVCH162525PV PDF预览

74ALVCH162525PV

更新时间: 2024-11-06 10:44:47
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 83K
描述
SSOP-56, Tube

74ALVCH162525PV 数据手册

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3.3V CMOS 18-BIT REGIS-  
TERED BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
AND BUS-HOLD  
IDT74ALVC162525  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This 18-bit registered bus transceiver is built using advanced dual metal  
CMOStechnology.Dataflowineachdirectioniscontrolledbyoutput-enable  
(OEABandOEBA)andclock-enable(CLKENABandCLKENBA)inputs.For  
theA-to-Bdataflow,thedataflowsthroughasingleregister.TheB-to-Adata  
canflowthroughafour-stagepipelineregisterpath,orthroughasingleregister  
path,dependingonthestateoftheselect(SEL)input.Dataisstoredintheinternal  
registersonthelow-to-hightransitionoftheclock(CLK)input,providedthatthe  
appropriateCLKENinputsarelow.TheA-to-Bdatatransferissynchronized  
totheCLKABinput,andB-to-AdatatransferissynchronizedwiththeCLK1BA  
andCLK2BAinputs.  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
Available in SSOP, TSSOP, and TVSOP packages  
TheALVCH162525hasseriesresistorsinthedeviceoutputstructureofthe  
“B”portwhichwillsignificantlyreducelinenoisewhenusedwithlightloads.This  
driverhasbeendesignedtodrive±12mAatthedesignatedthresholdlevels.  
The A” port has a ±24mA driver.  
Toensure the high-impedance state duringpoweruporpowerdown, OE  
shouldbetiedtoVCCthroughapullupresistor;theminimumvalueoftheresistor  
isdeterminedbythecurrent-sinkingcapabilityofthedriver.  
The ALVCH162525 has bus-hold” which retains the inputs’ last state  
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs  
andeliminatestheneedforpull-up/downresistors.  
DRIVE FEATURES:  
High Output Drivers: ±24mA (A port)  
• Balanced Output Drivers: ±12mA (B port)  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
55  
CLKAB  
30  
CLK1BA  
29  
CLK2BA  
28  
CLKENBA  
1
CLKENAB  
2
OEAB  
27  
OEBA  
56  
SEL  
CE  
CE  
C1  
CE  
C1  
1D  
CE  
1
C1  
C1  
1D  
3
A1  
1D  
54  
0
1D  
B1  
CE  
C1  
1D  
1 of 18 Channels  
To 17 Other Channels  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4220/1  

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