5秒后页面跳转
74AHCT2G00DP-Q100H PDF预览

74AHCT2G00DP-Q100H

更新时间: 2024-11-24 14:47:03
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
14页 114K
描述
Dual 2-input NAND gate TSSOP 8-Pin

74AHCT2G00DP-Q100H 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:3 MM, PLASTIC, SOT505-2, TSSOP-8
针数:8Reach Compliance Code:compliant
风险等级:5.84系列:AHCT/VHCT/VT
JESD-30 代码:S-PDSO-G8长度:3 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A功能数量:2
输入次数:2端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.16
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:AEC-Q100座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:3 mmBase Number Matches:1

74AHCT2G00DP-Q100H 数据手册

 浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第2页浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第3页浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第4页浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第5页浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第6页浏览型号74AHCT2G00DP-Q100H的Datasheet PDF文件第7页 
74AHC2G00-Q100;  
74AHCT2G00-Q100  
Dual 2-input NAND gate  
Rev. 1 — 21 March 2013  
Product data sheet  
1. General description  
The 74AHC2G00-Q100; 74AHCT2G00-Q100 are high-speed Si-gate CMOS devices.  
They provide two 2-input NAND gates.  
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.  
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Symmetrical output impedance  
High noise immunity  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Low power dissipation  
Balanced propagation delays  
Multiple package options  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AHC2G00DP-Q100  
74AHCT2G00DP-Q100  
74AHC2G00DC-Q100  
74AHCT2G00DC-Q100  
40 C to +125 C  
TSSOP8  
plastic thin shrink small outline package; 8 leads; SOT505-2  
body width 3 mm; lead length 0.5 mm  
40 C to +125 C  
VSSOP8  
plastic very thin shrink small outline package;  
8 leads; body width 2.3 mm  
SOT765-1  
 
 
 

与74AHCT2G00DP-Q100H相关器件

型号 品牌 获取价格 描述 数据表
74AHCT2G00GD NXP

获取价格

Dual 2-input NAND gate
74AHCT2G00GD,125 NXP

获取价格

74AHC(T)2G00 - Dual 2-input NAND gate SON 8-Pin
74AHCT2G00-Q100 NEXPERIA

获取价格

Dual 2-input NAND gate
74AHCT2G08 NXP

获取价格

Dual 2-input AND gate
74AHCT2G08DC NXP

获取价格

Dual 2-input AND gate
74AHCT2G08DC NEXPERIA

获取价格

Dual 2-input AND gateProduction
74AHCT2G08DC-G NXP

获取价格

暂无描述
74AHCT2G08DC-Q100 NEXPERIA

获取价格

Automotive product qualification in accordance with AEC-Q100
74AHCT2G08DC-Q100H NXP

获取价格

74AHC(T)2G08-Q100 - Dual 2-input AND gate SSOP 8-Pin
74AHCT2G08DP NXP

获取价格

Dual 2-input AND gate