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74AHCT2G08 PDF预览

74AHCT2G08

更新时间: 2024-11-06 22:20:39
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
17页 88K
描述
Dual 2-input AND gate

74AHCT2G08 数据手册

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74AHC2G08; 74AHCT2G08  
Dual 2-input AND gate  
Rev. 02 — 18 October 2004  
Product data sheet  
1. General description  
The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device.  
The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates.  
2. Features  
Symmetrical output impedance  
High noise immunity  
ESD protection:  
HBM EIA/JESD22-A114-B exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V  
CDM EIA/JESD22-C101 exceeds 1000 V.  
Low power dissipation  
Balanced propagation delays  
Multiple package options  
Specified from 40 °C to +80 °C and from 40 °C to +125 °C.  
3. Quick reference data  
Table 1:  
Quick reference data  
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.  
Symbol  
Parameter  
Conditions  
Min Typ Max Unit  
Type 74AHC2G08  
tPHL, tPLH  
propagation delay  
CL = 15 pF; VCC = 5 V  
-
3.2  
5.9  
ns  
A and B to Y  
CI  
input capacitance  
-
-
1.5  
17  
10  
-
pF  
pF  
[1] [2]  
CPD  
power dissipation  
capacitance  
CL = 50 pF; fi = 1 MHz  

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