Datasheet > 74AHCT2G00GD

74AHCT2G00GD

更新时间： 2024-11-24 06:31:51

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
14页	83K
描述
Dual 2-input NAND gate

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数据手册

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74AHCT2G00GD 数据手册

74AHC2G00; 74AHCT2G00

Dual 2-input NAND gate

Rev. 02 — 12 January 2009

Product data sheet

1. General description

The 74AHC2G00; 74AHCT2G00 is a high-speed Si-gate CMOS device.

The 74AHC2G00; 74AHCT2G00 provides two 2-input NAND gates.

2. Features

I Symmetrical output impedance

I High noise immunity

I ESD protection:

N HBM JESD22-A114E exceeds 2000 V

N MM JESD22-A115-A exceeds 200 V

N CDM JESD22-C101C exceeds 1000 V

I Low power dissipation

I Balanced propagation delays

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74AHC2G00DP

74AHCT2G00DP

74AHC2G00DC

74AHCT2G00DC

74AHC2G00GD

74AHCT2G00GD

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads; body SOT505-2

width 3 mm; lead length 0.5 mm

VSSOP8

plastic very thin shrink small outline package; 8 leads; SOT765-1

body width 2.3 mm

XSON8U plastic extremely thin small outline package; no leads; SOT996-2

8 terminals; UTLP based; body 3 × 2 × 0.5 mm

12 3 4 5 6 7...14

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