Datasheet > 74AHCT139-Q100

74AHCT139-Q100

更新时间： 2024-11-03 01:02:15

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
16页	696K
描述
Dual 2-to-4 line decoder/demultiplexer

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74AHCT139-Q100 数据手册

74AHC139-Q100;

74AHCT139-Q100

Dual 2-to-4 line decoder/demultiplexer

Rev. 1 — 5 June 2013

Product data sheet

1. General description

The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed Si-gate CMOS device and is

pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with

JEDEC standard No. 7A.

The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed, dual 2-to-4 line

decoder/demultiplexer. This device has two independent decoders. Each decoder accepts

two binary weighted inputs (nA0 and nA1) and provides four mutually exclusive active

LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE

is HIGH, every output is forced HIGH. The enable input can be used as the data input for

a 1-to-4 demultiplexer application.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Balanced propagation delays

 All inputs have Schmitt-trigger actions

 Inputs accept voltages higher than V_CC

 Input levels:

 For 74AHC139-Q100: CMOS level

 For 74AHCT139-Q100: TTL level

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

12 3 4 5 6 7...16

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