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74AHCT14PW-Q100 PDF预览

74AHCT14PW-Q100

更新时间: 2024-11-02 14:49:15
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
17页 256K
描述
IC INVERT GATE, Gate

74AHCT14PW-Q100 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.6
系列:AHCT/VHCT/VTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:INVERTER湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):10 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74AHCT14PW-Q100 数据手册

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74AHC14-Q100; 74AHCT14-Q100  
Hex inverting Schmitt trigger  
Rev. 1 — 9 July 2012  
Product data sheet  
1. General description  
The 74AHC14-Q100; 74AHCT14-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with  
JEDEC standard No. 7A.  
The 74AHC14-Q100; 74AHCT14-Q100 provides six inverting buffers with Schmitt trigger  
action. They are capable of transforming slowly changing input signals into sharply  
defined, jitter-free output signals.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have Schmitt trigger actions  
Inputs accept voltages higher than VCC  
Input levels:  
For 74AHC14-Q100: CMOS level  
For 74AHCT14-Q100: TTL level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  
Multiple package options  

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