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74AHC573PW-Q100 PDF预览

74AHC573PW-Q100

更新时间: 2024-09-13 20:03:59
品牌 Logo 应用领域
恩智浦 - NXP 驱动
页数 文件大小 规格书
19页 148K
描述
IC DRIVER, Bus Driver/Transceiver

74AHC573PW-Q100 技术参数

生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.6系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G20长度:6.5 mm
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):19.5 ns
筛选级别:AEC-Q100座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

74AHC573PW-Q100 数据手册

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74AHC573-Q100; 74AHCT573-Q100  
Octal D-type transparant latch; 3-state  
Rev. 1 — 10 June 2013  
Product data sheet  
1. General description  
The 74AHC573-Q100; 74AHCT573-Q100 is a high-speed Si-gate CMOS device and is  
pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with  
JEDEC standard No. 7A.  
The 74AHC573-Q100; 74AHCT573-Q100 consists of eight D-type transparent latches  
featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented  
applications. A latch enable input (LE) and an output enable input (OE) are common to all  
latches.  
When pin LE is HIGH, data at the Dn inputs enters the latches. In this condition the  
latches are transparent, i.e. a latch output will change state each time its corresponding  
Dn input changes. When pin LE is LOW, the latches store the information that is present  
at the Dn inputs, after a set-up time preceding the HIGH-to-LOW transition of LE.  
When pin OE is LOW, the contents of the 8 latches are available at the outputs. When  
pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE  
input does not affect the state of the latches.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have a Schmitt trigger action  
Common 3-state output enable input  
Inputs accept voltages higher than VCC  
Input levels:  
For 74AHC573-Q100: CMOS input level  
For 74AHCT573-Q100: TTL input level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
 
 

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