Datasheet > 74AHC126D,112

74AHC126D,112

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74AHC126D,112 数据手册

74AHC126; 74AHCT126

Quad buffer/line driver; 3-state

Rev. 04 — 12 August 2009

Product data sheet

1. General description

The 74AHC126; 74AHCT126 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7-A.

The 74AHC126; 74AHCT126 provides four non-inverting buffer/line drivers with 3-state

outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE).

A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state.

The 74AHC126; 74AHCT126 is identical to the 74AHC125; 74AHCT125 but has active

HIGH output enable inputs.

2. Features

I Balanced propagation delays

I All inputs have Schmitt-trigger action

I Inputs accept voltages higher than V_CC

I Input levels:

N For 74AHC126: CMOS level

N For 74AHCT126: TTL level

I ESD protection:

N HBM JESD22-A114E exceeds 2000 V

N MM JESD22-A115-A exceeds 200 V

N CDM JESD22-C101C exceeds 1000 V

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

12 3 4 5 6 7...15

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型号	品牌	替代类型	描述	数据表
74VHC126MTR	STMICROELECTRONICS	功能相似	QUAD BUS BUFFERS (3-STATE)
SN74AHC126DR	TI	功能相似	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

型号	品牌	获取价格	描述	数据表
74AHC126D,118	NXP	获取价格	74AHC(T)126 - Quad buffer/line driver; 3-state SOIC 14-Pin
74AHC126D-Q100	NEXPERIA	获取价格	Quad buffer/line driver; 3-state
74AHC126D-T	NXP	获取价格	暂无描述
74AHC126PW	NXP	获取价格	Quad buffer/line driver; 3-state
74AHC126PW	NEXPERIA	获取价格	Quad buffer/line driver; 3-stateProduction
74AHC126PW,112	NXP	获取价格	74AHC(T)126 - Quad buffer/line driver; 3-state TSSOP 14-Pin
74AHC126PW,118	NXP	获取价格	74AHC(T)126 - Quad buffer/line driver; 3-state TSSOP 14-Pin
74AHC126PW/T3	NXP	获取价格	AHC/VHC/H/U/V SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 4.40 MM, PLASTIC, MO-153, SO
74AHC126PWDH	NXP	获取价格	Quad buffer/line driver; 3-state
74AHC126PW-Q100	NEXPERIA	获取价格	Quad buffer/line driver; 3-state