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74AHC132PW PDF预览

74AHC132PW

更新时间: 2024-11-05 11:10:51
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
16页 272K
描述
Quad 2-input NAND Schmitt triggerProduction

74AHC132PW 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.63
系列:AHC/VHC/H/U/VJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:NAND GATE湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):19.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74AHC132PW 数据手册

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74AHC132; 74AHCT132  
Quad 2-input NAND Schmitt trigger  
Rev. 7 — 3 July 2020  
Product data sheet  
1. General description  
The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are  
overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage  
environments.  
2. Features and benefits  
Wide supply voltage range from 2.0 V to 5.5 V  
Overvoltage tolerant inputs to 5.5 V  
High noise immunity  
CMOS low power dissipation  
Input levels:  
For 74AHC132: CMOS level  
For 74AHCT132: TTL level  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101C exceeds 1000 V  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
 
 

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