Datasheet > 74ACTQ273SCX

74ACTQ273SCX

更新时间： 2024-11-14 23:24:03

品牌	Logo	应用领域
其他 - ETC		触发器逻辑集成电路光电二极管
页数	文件大小	规格书
9页	109K
描述
Octal D-Type Flip-Flop

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74ACTQ273SCX 数据手册

August 1989

Revised August 2001

74ACTQ273

Quiet Series Octal D-Type Flip-Flop

General Description

Features

The ACTQ273 has eight edge-triggered D-type flip-flops

with individual D inputs and Q outputs. The common buff-

ered Clock (CP) and Master Reset (MR) input load and

reset (clear) all flip-flops simultaneously.

■ I_CCreduced by 50%

■ Guaranteed simultaneous switching noise level and

dynamic threshold performance

■ Guaranteed pin-to-pin skew AC performance

■ Improved latch-up immunity

The register is fully edge-triggered. The state of each D-

type input, one setup time before the LOW-to-HIGH clock

transition, is transferred to the corresponding flip-flop’s Q

output.

■ Buffered common clock and asynchronous master reset

■ Outputs source/sink 24 mA

All outputs will be forced LOW independently of Clock or

Data inputs by a LOW voltage level on the MR input. The

device is useful for applications where the true output only

is required and the Clock and Master Reset are common to

all storage elements.

■ 4 kV minimum ESD immunity

The ACTQ utilizes Fairchild Quiet Series technology to

guarantee quiet output switching and improved dynamic

threshold performance. FACT Quiet Series features

GTO output control and undershoot corrector in addition

to a split ground bus for superior performance.

Ordering Code:

Order Number Package Number

Package Description

74ACTQ273SC

74ACTQ273SJ

74ACTQ273MTC

74ACTQ273PC

M20B

M20D

MTC20

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

Pin Names

D₀–D₇

Description

Data Inputs

Master Reset

Clock Pulse Input

Data Outputs

Q₀–Q₇

FACT , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.

DS010585

www.fairchildsemi.com

12 3 4 5 6 7...9

中文翻译

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与74ACTQ273SCX相关器件

型号	品牌	获取价格	描述	数据表
74ACTQ273SCX_NL	FAIRCHILD	获取价格	D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20
74ACTQ273SJ	FAIRCHILD	获取价格	Quiet Series Octal D-Type Flip-Flop
74ACTQ273SJ	TI	获取价格	ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20
74ACTQ273SJQR	TI	获取价格	ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20
74ACTQ273SJX	FAIRCHILD	获取价格	Quiet Series Octal D-Type Flip-Flop
74ACTQ32	FAIRCHILD	获取价格	Quiet Series Quad 2-Input OR Gate
74ACTQ3283TVFJ	ETC	获取价格	Quad 8-bit Bus Transceiver
74ACTQ32PC	FAIRCHILD	获取价格	Quad 2-input OR Gate
74ACTQ32PCQR	ETC	获取价格	Quad 2-input OR Gate
74ACTQ32SC	FAIRCHILD	获取价格	Quad 2-input OR Gate

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