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74ACTQ32SJX PDF预览

74ACTQ32SJX

更新时间: 2024-10-31 23:24:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 156K
描述
Quad 2-input OR Gate

74ACTQ32SJX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.69
系列:ACTJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:7 ns
传播延迟(tpd):7 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

74ACTQ32SJX 数据手册

 浏览型号74ACTQ32SJX的Datasheet PDF文件第2页浏览型号74ACTQ32SJX的Datasheet PDF文件第3页浏览型号74ACTQ32SJX的Datasheet PDF文件第4页浏览型号74ACTQ32SJX的Datasheet PDF文件第5页浏览型号74ACTQ32SJX的Datasheet PDF文件第6页浏览型号74ACTQ32SJX的Datasheet PDF文件第7页 
March 1993  
Revised September 2000  
74ACTQ32  
Quiet Series Quad 2-Input OR Gate  
General Description  
Features  
The ACTQ320 contains four, 2-input OR gates and utilizes  
Fairchild Quiet Series technology to guarantee quiet output  
switching and improved dynamic threshold performance.  
FACT Quiet Series features GTO output control and  
undershoot corrector in addition to a split ground bus for  
superior ACMOS performance.  
ICC reduced by 50%  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Improved latch-up immunity  
Minimum 4 kV ESD protection  
TTL-compatible inputs  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT32SC  
74ACT32SJ  
74ACT32PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Descriptions  
Inputs  
Outputs  
FACT , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS010893  
www.fairchildsemi.com  

74ACTQ32SJX 替代型号

型号 品牌 替代类型 描述 数据表
74ACTQ32SJ FAIRCHILD

类似代替

Quad 2-input OR Gate

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