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74ACTQ273SCX_NL PDF预览

74ACTQ273SCX_NL

更新时间: 2024-12-01 19:53:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 247K
描述
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, MS-013, SOIC-20

74ACTQ273SCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.64
系列:ACTJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:110000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
最小 fmax:110 MHzBase Number Matches:1

74ACTQ273SCX_NL 数据手册

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May 2007  
74ACTQ273  
tm  
Quiet Series Octal D-Type Flip-Flop  
Features  
General Description  
I reduced by 50%  
The ACTQ273 has eight edge-triggered D-type flip-flops  
with individual D inputs and Q outputs. The common  
buffered Clock (CP) and Master Reset (MR) input load  
and reset (clear) all flip-flops simultaneously.  
CC  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Improved latch-up immunity  
The register is fully edge-triggered. The state of each  
D-type input, one setup time before the LOW-to-HIGH  
clock transition, is transferred to the corresponding flip-  
flop's Q output.  
Buffered common clock and asynchronous master  
reset  
Outputs source/sink 24mA  
4kV minimum ESD immunity  
All outputs will be forced LOW independently of Clock or  
Data inputs by a LOW voltage level on the MR input. The  
device is useful for applications where the true output  
only is required and the Clock and Master Reset are  
common to all storage elements.  
The ACTQ utilizes Fairchild Quiet Series™ technology to  
guarantee quiet output switching and improved dynamic  
threshold performance. FACT Quiet Series™ features  
GTO™ output control and undershoot corrector in addi-  
tion to a split ground bus for superior performance.  
Ordering Information  
Package  
Order Number  
74ACTQ273SC  
74ACTQ273SJ  
74ACTQ273MTC  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
Connection Diagram  
Pin Description  
Pin Names  
Description  
D –D  
Data Inputs  
0
7
MR  
CP  
Master Reset  
Clock Pulse Input  
Data Outputs  
Q –Q  
0
7
FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.  
©1989 Fairchild Semiconductor Corporation  
74ACTQ273 Rev. 1.4  
www.fairchildsemi.com  

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