54ACT11000, 74ACT11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS002A – D2957, JUNE 1987 – REVISED APRIL 1993
54ACT11000 . . . J PACKAGE
74ACT11000 . . . D OR N PACKAGE
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
(TOP VIEW)
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
1B
2A
2B
V
1A
1Y
2Y
GND
GND
3Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
• EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
CC
V
• 500-mA Typical Latch-Up Immunity at 125°C
CC
3A
3B
4A
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and
Ceramic 300-mil DIPs
4Y
4B
description
54ACT11000 . . . FK PACKAGE
(TOP VIEW)
These devices contain four independent 2-input
NAND gates. They perform the Boolean functions
Y = A B or Y = A + B in positive logic.
The 54ACT11000 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74ACT11000 is characterized for
operation from – 40°C to 85°C.
3
2
1
20 19
18
3B
4A
NC
4B
4Y
2A
1B
NC
1A
1Y
4
5
6
7
8
17
16
15
14
FUNCTION TABLE
(each gate)
9 10 11 12 13
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
L
H
H
NC – No internal connection
X
†
logic symbol
logic diagram (positive logic)
1
1A
16
1A
1Y
1B
&
2
3
6
7
1Y
2Y
3Y
4Y
1B
15
2A
2Y
2B
2A
14
2B
11
3A
10
3A
3Y
3B
3B
9
4A
8
4A
4Y
4B
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
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