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74AC161_03 PDF预览

74AC161_03

更新时间: 2024-11-11 04:47:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
11页 156K
描述
Synchronous Presettable Binary Counter

74AC161_03 数据手册

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November 1988  
Revised September 2003  
74AC161 74ACT161  
Synchronous Presettable Binary Counter  
General Description  
Features  
The AC/ACT161 are high-speed synchronous modulo-16  
binary counters. They are synchronously presettable for  
application in programmable dividers and have two types  
of Count Enable inputs plus a Terminal Count output for  
versatility in forming synchronous multistage counters. The  
AC/ACT161 has an asynchronous Master Reset input that  
overrides all other inputs and forces the outputs LOW.  
ICC reduced by 50%  
Synchronous counting and loading  
High-speed synchronous expansion  
Typical count rate of 125 MHz  
Outputs source/sink 24 mA  
ACT161 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC161SC  
74AC161SJ  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC161MTC  
74AC161PC  
74ACT161SC  
74ACT161SJ  
74ACT161MTC  
74ACT161PC  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16A  
M16D  
MTC16  
N16E  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Symbols  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
CEP  
CET  
CP  
Count Enable Parallel Input  
Count Enable Trickle Input  
Clock Pulse Input  
MR  
Asynchronous Master Reset Input  
Parallel Data Inputs  
P0P3  
PE  
Parallel Enable Inputs  
Flip-Flop Outputs  
Q0Q3  
TC  
Terminal Count Output  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2003 Fairchild Semiconductor Corporation  
DS009931  
www.fairchildsemi.com  

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