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74AC161SCT PDF预览

74AC161SCT

更新时间: 2024-11-11 12:59:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
11页 118K
描述
Binary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, PDSO16, SOIC-16

74AC161SCT 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.61Is Samacsys:N
其他特性:TCO OUTPUT计数方向:UP
系列:ACJESD-30 代码:R-PDSO-G16
长度:9.9 mm负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:125 MHz
Base Number Matches:1

74AC161SCT 数据手册

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November 1988  
Revised November 1999  
74AC161 74ACT161  
Synchronous Presettable Binary Counter  
General Description  
Features  
The AC/ACT161 are high-speed synchronous modulo-16  
binary counters. They are synchronously presettable for  
application in programmable dividers and have two types  
of Count Enable inputs plus a Terminal Count output for  
versatility in forming synchronous multistage counters. The  
AC/ACT161 has an asynchronous Master Reset input that  
overrides all other inputs and forces the outputs LOW.  
ICC reduced by 50%  
Synchronous counting and loading  
High-speed synchronous expansion  
Typical count rate of 125 MHz  
Outputs source/sink 24 mA  
ACT161 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC161SC  
74AC161SJ  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC161MTC  
74AC161PC  
74ACT161SC  
74ACT161SJ  
74ACT161MTC  
74ACT161PC  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16A  
M16D  
MTC16  
N16E  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Symbols  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
CEP  
CET  
CP  
Count Enable Parallel Input  
Count Enable Trickle Input  
Clock Pulse Input  
Asynchronous Master Reset Input  
MR  
P0P3  
Parallel Data Inputs  
Parallel Enable Inputs  
Flip-Flop Outputs  
PE  
Q0Q3  
TC  
Terminal Count Output  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009931  
www.fairchildsemi.com  

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