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74AC16240DLR PDF预览

74AC16240DLR

更新时间: 2024-11-11 12:58:19
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器输出元件
页数 文件大小 规格书
9页 171K
描述
16-Bit Bus Drivers With 3-State Outputs 48-SSOP -40 to 85

74AC16240DLR 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:0.300 INCH, PLASTIC, SSOP-48针数:48
Reach Compliance Code:not_compliant风险等级:5.87
Is Samacsys:N控制类型:ENABLE LOW
系列:ACJESD-30 代码:R-PDSO-G48
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
Prop。Delay @ Nom-Sup:10.2 ns传播延迟(tpd):7.1 ns
认证状态:Not Qualified座面最大高度:2.79 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

74AC16240DLR 数据手册

 浏览型号74AC16240DLR的Datasheet PDF文件第2页浏览型号74AC16240DLR的Datasheet PDF文件第3页浏览型号74AC16240DLR的Datasheet PDF文件第4页浏览型号74AC16240DLR的Datasheet PDF文件第5页浏览型号74AC16240DLR的Datasheet PDF文件第6页浏览型号74AC16240DLR的Datasheet PDF文件第7页 
ꢄ ꢅ ꢊꢋꢌ ꢍ ꢋꢎꢏ ꢐ ꢑꢌ ꢒ ꢓꢑ  
SCAS234B − JULY 1990 − REVISED OCTOBER 1996  
54AC16240 . . . WD PACKAGE  
74AC16240 . . . DL PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
Members of the Texas Instruments  
Widebus Family  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1
48 2OE  
47 1A1  
46 1A2  
45 GND  
44 1A3  
43 1A4  
Flow-Through Architecture Optimizes PCB  
Layout  
2
3
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
4
CC  
5
6
EPIC(Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity at  
V
7
42  
V
CC  
CC  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
8
41 2A1  
40 2A2  
39 GND  
38 2A3  
37 2A4  
36 3A1  
35 3A2  
34 GND  
33 3A3  
32 3A4  
9
125°C  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) Package Using  
25-mil Center-to-Center Pin Spacings and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Package Using 25-mil Center-to-Center Pin  
Spacings  
description  
V
31  
V
CC  
CC  
The ’AC16240 are 16-bit buffers and line drivers  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
30 4A1  
29 4A2  
28 GND  
27 4A3  
designed specifically to improve both the  
performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
receivers and transmitters.  
26  
25  
4A4  
3OE  
4OE  
They can be used as four 4-bit buffers, two 8-bit  
buffers, or one 16-bit buffer. These devices  
provide inverting outputs and symmetrical  
active-low output-enable (OE) inputs.  
The 74AC16240 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed circuit board area.  
The 54AC16240 is characterized for operation over the full military temperature range of −55°C to 125°C.  
The 74AC16240 is characterized for operation from −40°C to 85°C.  
FUNCTION TABLE  
(each 4-bit buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
L
H
Z
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
ꢎ ꢙ ꢚꢓꢏꢏ ꢗ ꢍꢕ ꢓꢑꢔ ꢌꢏ ꢓ ꢙ ꢗꢍꢓꢐ ꢛꢜ ꢝꢞ ꢟꢠꢡ ꢢꢣꢤ ꢥꢛ ꢡꢠ ꢥꢛꢦ ꢝꢥꢞ ꢘꢑ ꢗ ꢐ ꢎ ꢃꢍ ꢌꢗ ꢙ  
ꢩꢦ ꢨ ꢦ ꢣ ꢤ ꢛ ꢤ ꢨ ꢞ ꢬ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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