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74AC161SCX

更新时间： 2024-11-10 23:23:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		计数器触发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
11页	118K
描述
Synchronous Up Counter

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数据手册
替代型号

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74AC161SCX 数据手册

November 1988

Revised November 1999

74AC161 • 74ACT161

Synchronous Presettable Binary Counter

General Description

Features

The AC/ACT161 are high-speed synchronous modulo-16

binary counters. They are synchronously presettable for

application in programmable dividers and have two types

of Count Enable inputs plus a Terminal Count output for

versatility in forming synchronous multistage counters. The

AC/ACT161 has an asynchronous Master Reset input that

overrides all other inputs and forces the outputs LOW.

■ I_CCreduced by 50%

■ Synchronous counting and loading

■ High-speed synchronous expansion

■ Typical count rate of 125 MHz

■ Outputs source/sink 24 mA

■ ACT161 has TTL-compatible inputs

Ordering Code:

Order Number Package Number

Package Description

74AC161SC

74AC161SJ

M16A

M16D

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC161MTC

74AC161PC

74ACT161SC

74ACT161SJ

74ACT161MTC

74ACT161PC

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

M16A

M16D

MTC16

N16E

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Logic Symbols

IEEE/IEC

Pin Descriptions

Pin Names

Description

CEP

CET

Count Enable Parallel Input

Count Enable Trickle Input

Clock Pulse Input

Asynchronous Master Reset Input

P₀–P₃

Parallel Data Inputs

Parallel Enable Inputs

Flip-Flop Outputs

Q₀–Q₃

Terminal Count Output

FACT is a trademark of Fairchild Semiconductor Corporation.

DS009931

www.fairchildsemi.com

12 3 4 5 6 7...11

中文翻译

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74AC161SCX 替代型号

型号	品牌	替代类型	描述	数据表
74AC161SC	FAIRCHILD	完全替代	Synchronous Presettable Binary Counter
74AC161MTC	FAIRCHILD	完全替代	Synchronous Presettable Binary Counter
MC74AC161DG	ONSEMI	类似代替	同步可预置二进制计数器

与74AC161SCX相关器件

型号	品牌	获取价格	描述	数据表
74AC161SCX_NL	FAIRCHILD	获取价格	Binary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS
74AC161SJ	FAIRCHILD	获取价格	Synchronous Presettable Binary Counter
74AC161SJX	FAIRCHILD	获取价格	Synchronous Up Counter
74AC161SJX_NL	FAIRCHILD	获取价格	Binary Counter, Synchronous, Up Direction, CMOS, PDSO16,
74AC161TTR	ETC	获取价格	Synchronous Up Counter
74AC16240	TI	获取价格	16-BIT BUS DRIVERS WITH 3-STATE OUTPUTS
74AC16240DGG	NXP	获取价格	IC AC SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74AC16240DGG-T	NXP	获取价格	IC AC SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74AC16240DG-T	NXP	获取价格	IC AC SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74AC16240DL	TI	获取价格	16-BIT BUS DRIVERS WITH 3-STATE OUTPUTS

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