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74ABT16373CMTDX PDF预览

74ABT16373CMTDX

更新时间: 2024-11-25 23:23:59
品牌 Logo 应用领域
其他 - ETC 锁存器逻辑集成电路光电二极管信息通信管理驱动
页数 文件大小 规格书
6页 80K
描述
8-Bit D-Type Latch

74ABT16373CMTDX 数据手册

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March 1994  
Revised November 1999  
74ABT16373  
16-Bit Transparent D-Type Latch with 3-STATE Outputs  
General Description  
Features  
The ABT16373 contains sixteen non-inverting latches with  
3-STATE outputs and is intended for bus oriented applica-  
tions. The device is byte controlled. The flip-flops appear  
transparent to the data when the Latch Enable (LE) is  
HIGH. When LE is LOW, the data that meets the setup time  
is latched. Data appears on the bus when the Output  
Enable (OE) is LOW. When OE is HIGH, the outputs are in  
high Z state.  
Separate control logic for each byte  
16-bit version of the ABT373  
High impedance glitch free bus loading during entire  
power up and power down cycle  
Non-destructive hot insertion capability  
Guaranteed latch-up protection  
Ordering Code:  
Order Number  
74ABT16373CSSC  
74ABT16373CMTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
Latch Enable Input  
Data Inputs  
LEn  
D0D15  
O0O15  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS011666  
www.fairchildsemi.com  

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