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74ABT16374 PDF预览

74ABT16374

更新时间: 2024-11-25 22:45:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
6页 89K
描述
16-Bit D-Type Flip-Flop with 3-STATE Outputs

74ABT16374 数据手册

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March 1994  
Revised May 2005  
74ABT16374  
16-Bit D-Type Flip-Flop with 3-STATE Outputs  
General Description  
Features  
The ABT16374 contains sixteen non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. A buffered clock  
(CP) and Output Enable (OE) are common to each byte  
and can be shorted together for full 16-bit operation.  
Separate control logic for each byte  
16-bit version of the ABT374  
Edge-triggered D-type inputs  
Buffered Positive edge-triggered clock  
High impedance glitch free bus loading during entire  
power up and power down cycle  
Non-destructive hot insertion capability  
Guaranteed latch-up protection  
Ordering Code:  
Order Number  
74ABT16374CSSC  
74ABT16374CMTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Name  
Description  
OEn  
3-STATE Output Enable Input (Active LOW)  
Clock Pulse Input (Active Rising Edge)  
Data Inputs  
CPn  
D0D15  
O0O15  
3-STATE Outputs  
© 2005 Fairchild Semiconductor Corporation  
DS011668  
www.fairchildsemi.com  

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